forked from animatedread/Warrior_EA
b91c7b1f7a
The //| box blocks were excluded from0b06f8eand5efdb48and were what remained: 160 of them ran to 10+ lines, the longest to 88. Compressed to their leading topic sentences - 5 lines for a function header, 8 for a file header - keeping the box format and the standard MQL5 name/author lines verbatim. Verified at the BYTE level this time, across every in-scope file: the list of non-comment lines is byte-identical to HEAD and braces balance. The first check compared a locale-decoded 'git show' against a UTF-8 read and flagged 25 files that had not changed at all - every BOM and every non-ASCII line mismatched. 47,696 -> 40,665 lines in scope; comment share 38% -> 26%. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
575 lines
29 KiB
MQL5
575 lines
29 KiB
MQL5
//+------------------------------------------------------------------+
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//| NetBuild.mqh |
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//| |
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//| CNet lifecycle: statics, topology construction from |
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//| CLayerDescription, OpenCL/DirectML init, destructor. |
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//| |
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//| Included from AI\Network.mqh AFTER every class declaration - |
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//| bodies only, no declarations. Relocation is behaviour-neutral by |
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//| construction: nothing here is reachable until Network.mqh ends. |
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//+------------------------------------------------------------------+
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#ifndef WARRIOR_AI_IMPL_NETBUILD_MQH
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#define WARRIOR_AI_IMPL_NETBUILD_MQH
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//+------------------------------------------------------------------+
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//| |
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//+------------------------------------------------------------------+
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double CNet::recentAverageSmoothingFactor = 10000.0; // Number of training samples to average over
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bool CNet::s_openclUnavailable = false;
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bool CNet::s_computeTierLogged = false;
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//+------------------------------------------------------------------+
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//| Element width that a conv or pool stage actually slides over. |
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//+------------------------------------------------------------------+
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int ConvChainInputWidth(CArrayLayer *builtLayers, CLayerDescription *prev, CLayerDescription *desc, int cursor)
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{
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if(CheckPointer(builtLayers) != POINTER_INVALID && builtLayers.Total() > 0)
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{
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CLayer *below = builtLayers.At(builtLayers.Total() - 1);
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if(CheckPointer(below) != POINTER_INVALID && below.Total() > 0)
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{
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CNeuronBaseOCL *belowNeuron = below.At(0);
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if(CheckPointer(belowNeuron) != POINTER_INVALID && belowNeuron.Neurons() > 0)
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return (int)belowNeuron.Neurons();
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}
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}
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//--- Nothing built yet (a window stage at index 0) - fall back to the description arithmetic.
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if(CheckPointer(prev) == POINTER_INVALID)
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return (CheckPointer(desc) == POINTER_INVALID ? cursor : (int)desc.count);
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if(prev.type == defNeuron || prev.type == defNeuronBaseOCL)
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return (int)prev.count;
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return cursor;
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}
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//+------------------------------------------------------------------+
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CNet::CNet(CArrayObj *Description)
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{
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//--- Before the early returns below: CNet(NULL) is a legitimate construction (see
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//--- InitNeuralNetwork) and must still leave the adjustment cleanly disabled.
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bLogitAdjust = false;
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ArrayInitialize(dLogitAdjust, 0.0);
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//--- Same rule for the mini-batch state - a net that returns early here must still read as
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//--- "per-sample updates, nothing accumulated" rather than as uninitialized memory.
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m_batchSizeRequested = 1;
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m_batchCount = 0;
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m_batchKernelsOk = false;
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m_applyKernelsOk = false;
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m_batchBegun = false;
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m_batchWarned = false;
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if(CheckPointer(Description) == POINTER_INVALID)
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return;
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//---
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int total = Description.Total();
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if(total <= 0)
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return;
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//---
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layers = new CArrayLayer();
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if(CheckPointer(layers) == POINTER_INVALID)
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return;
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//---
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CLayer *temp;
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CLayerDescription *desc = NULL, *next = NULL, *prev = NULL;
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CNeuronBase *neuron = NULL;
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CNeuronPool *neuron_p = NULL;
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int output_count = 0;
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int temp_count = 0;
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//---
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next = Description.At(1);
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if(CheckPointer(next) != POINTER_INVALID &&
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(next.type == defNeuron || next.type == defNeuronBaseOCL || next.type == defNeuronConv || next.type == defNeuronConvOCL ||
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next.type == defNeuronLSTM || next.type == defNeuronBatchNorm || next.type == defNeuronBatchNormOCL))
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{
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//--- OpenCL first, DirectML/D3D12 next, plain CPU as the final fallback
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if(!InitOpenCL())
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InitDirectML();
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}
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//--- Batch normalization exists only in the OCL neuron model (AI\NeuronBatchNorm.mqh); the legacy
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//--- scalar CNeuron path below has no counterpart. Rather than silently build a DIFFERENT network
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//--- than the topology asked for - which is precisely the class of bug that had models training
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//--- against a stale output head for a day - refuse, loudly, and leave an empty net behind. Callers
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//--- already treat a 0-layer net as a hard failure. Reaching here means OpenCL, DirectML AND the
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//--- CPU DLL all failed to initialize, which this project does not support for training anyway.
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if(CheckPointer(opencl) == POINTER_INVALID && CheckPointer(directml) == POINTER_INVALID)
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{
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for(int i = 0; i < total; i++)
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{
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CLayerDescription *probe = Description.At(i);
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if(CheckPointer(probe) != POINTER_INVALID &&
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(probe.type == defNeuronBatchNorm || probe.type == defNeuronBatchNormOCL))
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{
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Print(__FUNCTION__ + ": REFUSED - topology requests a batch-normalization layer but no compute"
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" backend initialized (no OpenCL, no DirectML, no CPU DLL). Batch norm has no scalar-CPU"
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" implementation; building without it would silently train a different architecture.");
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return;
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}
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}
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}
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//---
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for(int i = 0; i < total; i++)
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{
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prev = desc;
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desc = Description.At(i);
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if((i + 1) < total)
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{
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next = Description.At(i + 1);
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if(CheckPointer(next) == POINTER_INVALID)
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return;
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}
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else
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next = NULL;
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//--- How many outgoing weights this layer carries. The convention in this engine is that the
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//--- weight matrix feeding layer L is stored ON layer L-1, so only a DENSE successor claims one:
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//--- conv/pool/LSTM own their weights internally, and batch norm is elementwise and has none at
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//--- all (just gamma/beta, which live in its own parameter block). Getting this wrong for the new
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//--- type would allocate a full dense matrix that nothing ever reads or trains.
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int outputs = (next == NULL || (next.type != defNeuron && next.type != defNeuronBaseOCL) ? 0 : next.count);
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temp = new CLayer(outputs);
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int neurons = (desc.count + (desc.type == defNeuron || desc.type == defNeuronBaseOCL ? 1 : 0));
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if(CheckPointer(opencl) != POINTER_INVALID || CheckPointer(directml) != POINTER_INVALID)
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{
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CNeuronBaseOCL *neuron_ocl = NULL;
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switch(desc.type)
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{
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case defNeuron:
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case defNeuronBaseOCL:
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neuron_ocl = new CNeuronBaseOCL();
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if(CheckPointer(neuron_ocl) == POINTER_INVALID)
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{
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delete temp;
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return;
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}
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if(CheckPointer(opencl) != POINTER_INVALID
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? !neuron_ocl.Init(outputs, 0, opencl, desc.count, desc.optimization)
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: !neuron_ocl.Init(outputs, 0, directml, desc.count, desc.optimization))
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{
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delete temp;
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return;
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}
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neuron_ocl.SetActivationFunction(desc.activation);
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if(!temp.Add(neuron_ocl))
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{
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delete neuron_ocl;
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delete temp;
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return;
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}
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neuron_ocl = NULL;
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break;
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case defNeuronBatchNorm:
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case defNeuronBatchNormOCL:
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{
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CNeuronBatchNormOCL *neuron_bn = new CNeuronBatchNormOCL();
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if(CheckPointer(neuron_bn) == POINTER_INVALID)
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{
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delete temp;
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return;
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}
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//--- Elementwise, so this layer is exactly as wide as the one below it. Take that width
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//--- from the layer already built rather than from desc.count: a conv or pool stage's
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//--- output size is derived HERE (the sliding-window arithmetic above), so the topology
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//--- builder in ExpertSignalAIBase.mqh has no way to know it and cannot state it. Falls
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//--- back to desc.count only for the impossible case of a batch-norm layer at index 0.
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int bnUnits = desc.count;
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if(layers.Total() > 0)
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{
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CLayer *below = layers.At(layers.Total() - 1);
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if(CheckPointer(below) != POINTER_INVALID && below.Total() > 0)
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{
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CNeuronBaseOCL *belowNeuron = below.At(0);
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if(CheckPointer(belowNeuron) != POINTER_INVALID && belowNeuron.Neurons() > 0)
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bnUnits = belowNeuron.Neurons();
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}
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}
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bool bnInit = (CheckPointer(opencl) != POINTER_INVALID
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? neuron_bn.Init(outputs, 0, opencl, bnUnits, desc.batch, desc.optimization)
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: neuron_bn.Init(outputs, 0, directml, bnUnits, desc.batch, desc.optimization));
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if(!bnInit)
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{
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delete neuron_bn;
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delete temp;
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return;
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}
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if(!temp.Add(neuron_bn))
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{
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delete neuron_bn;
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delete temp;
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return;
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}
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neuron_bn = NULL;
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//--- Keep the running conv/pool sizing cursor pointing at this layer's real width, so a
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//--- conv or pool stage placed ABOVE a batch-norm layer still sizes correctly.
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output_count = bnUnits;
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break;
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}
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case defNeuronConv:
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case defNeuronConvOCL:
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{
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CNeuronConvOCL *neuron_conv = new CNeuronConvOCL();
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if(CheckPointer(neuron_conv) == POINTER_INVALID)
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{
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delete temp;
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return;
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}
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//--- number of sliding positions - same formula the CPU CNeuronConv path uses.
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//--- output_count keeps meaning POSITIONS (it is this layer's units_count); the width
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//--- being slid over comes from the built layer below - see ConvChainInputWidth.
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int convIn = ConvChainInputWidth(layers, prev, desc, output_count);
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temp_count = (convIn - desc.window) % desc.step;
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output_count = (convIn - desc.window - temp_count) / desc.step + (temp_count == 0 ? 1 : 2);
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bool convInit = (CheckPointer(opencl) != POINTER_INVALID
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? neuron_conv.Init(outputs, 0, opencl, desc.window, desc.step, desc.count, output_count, desc.optimization)
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: neuron_conv.Init(outputs, 0, directml, desc.window, desc.step, desc.count, output_count, desc.optimization));
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if(!convInit)
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{
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delete neuron_conv;
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delete temp;
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return;
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}
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neuron_conv.SetActivationFunction(desc.activation);
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if(!temp.Add(neuron_conv))
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{
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delete neuron_conv;
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delete temp;
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return;
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}
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neuron_conv = NULL;
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break;
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}
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case defNeuronPool:
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case defNeuronPoolOCL:
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{
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CNeuronPoolOCL *neuron_pool = new CNeuronPoolOCL();
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if(CheckPointer(neuron_pool) == POINTER_INVALID)
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{
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delete temp;
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return;
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}
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//--- number of sliding positions - same formula the CPU CNeuronPool path uses.
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//--- Critically this must slide over the conv's FULL output (positions * filters), which
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//--- is what ConvChainInputWidth returns; the position cursor alone would be window_out
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//--- times too small and pool the wrong element count entirely.
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int poolIn = ConvChainInputWidth(layers, prev, desc, output_count);
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temp_count = (poolIn - desc.window) % desc.step;
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output_count = (poolIn - desc.window - temp_count) / desc.step + (temp_count == 0 ? 1 : 2);
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bool poolInit = (CheckPointer(opencl) != POINTER_INVALID
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? neuron_pool.Init(outputs, 0, opencl, desc.window, desc.step, output_count, desc.optimization)
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: neuron_pool.Init(outputs, 0, directml, desc.window, desc.step, output_count, desc.optimization));
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if(!poolInit)
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{
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delete neuron_pool;
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delete temp;
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return;
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}
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if(!temp.Add(neuron_pool))
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{
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delete neuron_pool;
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delete temp;
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return;
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}
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neuron_pool = NULL;
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break;
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}
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case defNeuronLSTM:
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case defNeuronLSTMOCL:
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{
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CNeuronLSTMOCL *neuron_lstm = new CNeuronLSTMOCL();
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if(CheckPointer(neuron_lstm) == POINTER_INVALID)
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{
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delete temp;
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return;
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}
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bool lstmInit = (CheckPointer(opencl) != POINTER_INVALID
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? neuron_lstm.Init(outputs, 0, opencl, desc.count, desc.optimization)
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: neuron_lstm.Init(outputs, 0, directml, desc.count, desc.optimization));
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if(!lstmInit)
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{
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delete neuron_lstm;
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delete temp;
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return;
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}
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//--- desc.window carries the PER-TIMESTEP input width (see AddLstmStage) - the per-bar
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//--- feature count reaching this layer. It used to be dead metadata; it is now what
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//--- turns this into a recurrence over bars instead of one giant gated projection.
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neuron_lstm.SetStepWidth(desc.window);
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if(!temp.Add(neuron_lstm))
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{
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delete neuron_lstm;
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delete temp;
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return;
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}
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neuron_lstm = NULL;
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break;
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}
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default:
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return;
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break;
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}
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}
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else
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for(int n = 0; n < neurons; n++)
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{
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switch(desc.type)
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{
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case defNeuron:
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neuron = new CNeuron();
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if(CheckPointer(neuron) == POINTER_INVALID)
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{
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delete temp;
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delete layers;
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return;
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}
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//--- He-scaled init, matching CNeuronBaseOCL::Init's rationale - fan-in is this
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//--- layer's own neuron count (bias already included via the `neurons` count above).
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neuron.Init(outputs, n, desc.optimization, MathSqrt(2.0 / (double)neurons));
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neuron.SetActivationFunction(desc.activation);
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break;
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case defNeuronConv:
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neuron_p = new CNeuronConv();
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if(CheckPointer(neuron_p) == POINTER_INVALID)
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{
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delete temp;
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delete layers;
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return;
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}
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if(CheckPointer(prev) != POINTER_INVALID)
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{
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if(prev.type == defNeuron)
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{
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temp_count = (int)((prev.count - desc.window) % desc.step);
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output_count = (int)((prev.count - desc.window - temp_count) / desc.step + (temp_count == 0 ? 1 : 2));
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}
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else
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if(n == 0)
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{
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temp_count = (int)((output_count - desc.window) % desc.step);
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output_count = (int)((output_count - desc.window - temp_count) / desc.step + (temp_count == 0 ? 1 : 2));
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}
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}
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if(neuron_p.Init(outputs, n, desc.window, desc.step, output_count, desc.optimization))
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neuron = neuron_p;
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break;
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case defNeuronPool:
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neuron_p = new CNeuronPool();
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if(CheckPointer(neuron_p) == POINTER_INVALID)
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{
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delete temp;
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delete layers;
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return;
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}
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if(CheckPointer(prev) != POINTER_INVALID)
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{
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if(prev.type == defNeuron)
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{
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temp_count = (int)((prev.count - desc.window) % desc.step);
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output_count = (int)((prev.count - desc.window - temp_count) / desc.step + (temp_count == 0 ? 1 : 2));
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}
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else
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if(n == 0)
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{
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temp_count = (int)((output_count - desc.window) % desc.step);
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output_count = (int)((output_count - desc.window - temp_count) / desc.step + (temp_count == 0 ? 1 : 2));
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}
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}
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if(neuron_p.Init(outputs, n, desc.window, desc.step, output_count, desc.optimization))
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neuron = neuron_p;
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break;
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case defNeuronLSTM:
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neuron_p = new CNeuronLSTM();
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if(CheckPointer(neuron_p) == POINTER_INVALID)
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{
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delete temp;
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delete layers;
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return;
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}
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output_count = (next != NULL ? next.window : desc.step);
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if(neuron_p.Init(outputs, n, desc.window, 1, output_count, desc.optimization))
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neuron = neuron_p;
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break;
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}
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if(!temp.Add(neuron))
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{
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delete temp;
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delete layers;
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return;
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}
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neuron = NULL;
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}
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if(!layers.Add(temp))
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{
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delete temp;
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delete layers;
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return;
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}
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}
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//---
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}
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//+------------------------------------------------------------------+
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//| Tries to initialize OpenCL; on any failure (no GPU, driver |
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//| missing, kernel build error) frees it and leaves opencl==NULL |
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//| so the rest of CNet transparently runs its CPU code path. |
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//+------------------------------------------------------------------+
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bool CNet::InitOpenCL(void)
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{
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//--- pure-MQL5 inference: deliberately refuse a backend so the OCL neurons compute host-side.
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if(m_cpuInference)
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return false;
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if(CheckPointer(opencl) != POINTER_INVALID)
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return true;
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//--- already established (by an earlier CNet in this process) that this host has no OpenCL - skip the
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//--- probe rather than re-run a known failure and reprint the stdlib's banner. See s_openclUnavailable.
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if(s_openclUnavailable)
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return false;
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//---
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opencl = new COpenCLMy();
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if(CheckPointer(opencl) == POINTER_INVALID || !opencl.Initialize(cl_program, true))
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{
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if(CheckPointer(opencl) != POINTER_INVALID)
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delete opencl;
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opencl = NULL;
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s_openclUnavailable = true;
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PrintFormat("%s: OpenCL unavailable, falling back to CPU", __FUNCTION__);
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return false;
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}
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//--- create kernels
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opencl.SetKernelsCount(31);
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opencl.KernelCreate(def_k_FeedForward, "FeedForward");
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opencl.KernelCreate(def_k_CaclOutputGradient, "CaclOutputGradient");
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opencl.KernelCreate(def_k_CaclHiddenGradient, "CaclHiddenGradient");
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opencl.KernelCreate(def_k_UpdateWeightsMomentum, "UpdateWeightsMomentum");
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opencl.KernelCreate(def_k_UpdateWeightsAdam, "UpdateWeightsAdam");
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opencl.KernelCreate(def_k_FeedForwardConv, "FeedForwardConv");
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opencl.KernelCreate(def_k_CalcHiddenGradientConv, "CalcHiddenGradientConv");
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opencl.KernelCreate(def_k_UpdateWeightsConvMomentum, "UpdateWeightsConvMomentum");
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opencl.KernelCreate(def_k_UpdateWeightsConvAdam, "UpdateWeightsConvAdam");
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opencl.KernelCreate(def_k_LSTM_Gates, "LSTM_Gates");
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opencl.KernelCreate(def_k_LSTM_State, "LSTM_State");
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opencl.KernelCreate(def_k_LSTM_GateGradient, "LSTM_GateGradient");
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opencl.KernelCreate(def_k_LSTM_WeightsGradient, "LSTM_WeightsGradient");
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opencl.KernelCreate(def_k_LSTM_InputsGradient, "LSTM_InputsGradient");
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opencl.KernelCreate(def_k_LSTM_UpdateWeightsAdam, "LSTM_UpdateWeightsAdam");
|
|
opencl.KernelCreate(def_k_LSTM_UpdateWeightsMomentum, "LSTM_UpdateWeightsMomentum");
|
|
opencl.KernelCreate(def_k_FeedForwardProof, "FeedForwardProof");
|
|
opencl.KernelCreate(def_k_CalcInputGradientProof, "CalcInputGradientProof");
|
|
//--- Return values CHECKED here, unlike the calls above. A kernel that fails to build otherwise
|
|
//--- surfaces only as an Execute() failure deep inside training on a customer's machine, and these
|
|
//--- four are the newest and least-exercised code in the program. Reported, not fatal: a device
|
|
//--- without them can still run every non-recurrent topology.
|
|
bool seqOk = opencl.KernelCreate(def_k_LSTM_SeqStepForward, "LSTM_SeqStepForward");
|
|
seqOk = opencl.KernelCreate(def_k_LSTM_SeqStepGateGrad, "LSTM_SeqStepGateGrad") && seqOk;
|
|
seqOk = opencl.KernelCreate(def_k_LSTM_SeqStepWeightGrad, "LSTM_SeqStepWeightGrad") && seqOk;
|
|
seqOk = opencl.KernelCreate(def_k_LSTM_SeqStepInputGrad, "LSTM_SeqStepInputGrad") && seqOk;
|
|
if(!seqOk)
|
|
Print("CNet::InitOpenCL: WARNING - the sequence-LSTM kernels failed to build on this OpenCL device. LSTM and HYBRID will not train here; MLP and CONV are unaffected. Run those topologies on the CPU/DirectML tier instead.");
|
|
//--- Mini-batch accumulation (see AccumulateWeightGrad in Network.cl). Checked and reported for the
|
|
//--- same reason as the sequence kernels, and non-fatal in the same way: CNet::BatchSize() falls the
|
|
//--- whole net back to per-sample updates when these are missing, so an old device trains exactly as
|
|
//--- it did before rather than not at all.
|
|
m_batchKernelsOk = opencl.KernelCreate(def_k_AccumulateWeightGrad, "AccumulateWeightGrad");
|
|
m_batchKernelsOk = opencl.KernelCreate(def_k_AccumulateWeightGradConv, "AccumulateWeightGradConv") && m_batchKernelsOk;
|
|
m_batchKernelsOk = opencl.KernelCreate(def_k_AccumulateBufferInto, "AccumulateBufferInto") && m_batchKernelsOk;
|
|
if(!m_batchKernelsOk)
|
|
Print("CNet::InitOpenCL: WARNING - the mini-batch accumulation kernels failed to build on this OpenCL device. Training falls back to one weight update per sample (the pre-2026-08-09 behaviour), which is noisier but correct.");
|
|
//--- Device-side mini-batch APPLY. Tracked SEPARATELY from m_batchKernelsOk and degraded separately:
|
|
//--- these are a pure speed optimisation over a host-side step that still works and still produces
|
|
//--- the same answer, so a device that cannot build them must keep BATCHING (correctness, and the
|
|
//--- LR/patience compensation is tuned for it) and merely pay the transfers. Folding them into
|
|
//--- m_batchKernelsOk would silently drop such a device to batch size 1, changing the optimizer
|
|
//--- rather than the speed.
|
|
m_applyKernelsOk = opencl.KernelCreate(def_k_ApplyAccumAdam, "ApplyAccumAdam");
|
|
m_applyKernelsOk = opencl.KernelCreate(def_k_ApplyAccumMomentum, "ApplyAccumMomentum") && m_applyKernelsOk;
|
|
if(!m_applyKernelsOk)
|
|
{
|
|
//--- Latch the dispatch-side fast path off HERE as well, so a device that could not build the
|
|
//--- kernels gets exactly one warning at init instead of also paying (and logging) one failed
|
|
//--- Execute on the first batch before the runtime latch caught it.
|
|
g_applyAccumKernelUsable = false;
|
|
Print("CNet::InitOpenCL: WARNING - the device-side mini-batch apply kernels failed to build on this OpenCL device. Training still batches and is still correct, but each batch reads the weights back to the host and writes them out again - expect it to be several times slower.");
|
|
}
|
|
//--- Batch-norm kernels (2026-08-09). Same speed-only degradation contract as the apply kernels
|
|
//--- above: without them batch norm computes host-side exactly as it always did, paying its
|
|
//--- transfers, and nothing about the numbers changes.
|
|
bool bnOk = opencl.KernelCreate(def_k_BatchNormForward, "BatchNormForward");
|
|
bnOk = opencl.KernelCreate(def_k_BatchNormHiddenGrad, "BatchNormHiddenGrad") && bnOk;
|
|
bnOk = opencl.KernelCreate(def_k_BatchNormAccumGammaBeta, "BatchNormAccumGammaBeta") && bnOk;
|
|
bnOk = opencl.KernelCreate(def_k_BatchNormApplyGammaBeta, "BatchNormApplyGammaBeta") && bnOk;
|
|
if(!bnOk)
|
|
{
|
|
g_bnKernelUsable = false;
|
|
Print("CNet::InitOpenCL: WARNING - the batch-norm kernels failed to build on this OpenCL device. Batch norm runs host-side (the pre-2026-08-09 behaviour): correct, but every batch-norm layer pays a device round-trip per sample.");
|
|
}
|
|
return true;
|
|
}
|
|
//+------------------------------------------------------------------+
|
|
//| Second-tier GPU fallback: only tried when OpenCL init failed. |
|
|
//| Requires DirectML\WarriorDML.dll in the terminal's Libraries |
|
|
//| folder (build it with DirectML\build.bat); on any failure frees |
|
|
//| itself and leaves directml==NULL so CNet falls through to CPU. |
|
|
//+------------------------------------------------------------------+
|
|
bool CNet::InitDirectML(void)
|
|
{
|
|
//--- pure-MQL5 inference: deliberately refuse a backend so the OCL neurons compute host-side.
|
|
if(m_cpuInference)
|
|
return false;
|
|
//--- Tester/optimization/forward runs must not touch WarriorDML/WarriorCPU DLL imports.
|
|
//--- This avoids agent-side file-lock/synchronization failures on rapid stop/restart cycles.
|
|
if(MQLInfoInteger(MQL_TESTER) || MQLInfoInteger(MQL_OPTIMIZATION) || MQLInfoInteger(MQL_FORWARD))
|
|
return false;
|
|
if(CheckPointer(directml) != POINTER_INVALID)
|
|
return true;
|
|
//---
|
|
directml = new CDirectMLMy();
|
|
if(CheckPointer(directml) == POINTER_INVALID)
|
|
return false;
|
|
directml.SetCpuLoadPercent(EffectiveCpuLoadPercent());
|
|
if(!directml.Initialize())
|
|
{
|
|
int err = directml.LastError();
|
|
delete directml;
|
|
directml = NULL;
|
|
string reason;
|
|
switch(err)
|
|
{
|
|
case 1: reason = "CreateDXGIFactory1 failed"; break;
|
|
case 2: reason = "no DX12 hardware adapter found (feature level 11_0)"; break;
|
|
case 3: reason = "compute command queue creation failed"; break;
|
|
case 4: reason = "command allocator creation failed"; break;
|
|
case 5: reason = "command list creation failed"; break;
|
|
case 6: reason = "fence creation failed"; break;
|
|
case 7: reason = "fence event creation failed"; break;
|
|
case 8: reason = "HLSL kernel compile/PSO creation failed"; break;
|
|
default: reason = "neither WarriorDML.dll nor WarriorCPU.dll loaded (check Libraries folder / \"Allow DLL imports\")";
|
|
}
|
|
PrintFormat("%s: DirectML/D3D12 and CPU DLL both unavailable (%s), falling back to slow per-object CPU path", __FUNCTION__, reason);
|
|
return false;
|
|
}
|
|
//--- Announce the tier ONCE per process: it describes the host, not this particular net, and a run builds
|
|
//--- several nets (main + EMA shadow + sim/self-check clones). See s_computeTierLogged.
|
|
if(!s_computeTierLogged)
|
|
{
|
|
s_computeTierLogged = true;
|
|
if(directml.Tier() == COMPUTE_TIER_CPU)
|
|
{
|
|
//--- Report the SPLIT, not just the result. When several charts train at once this is the
|
|
//--- number that explains their speed, and it is the one that was silently wrong before.
|
|
int share = EffectiveCpuLoadPercent();
|
|
PrintFormat("%s: DirectML/D3D12 unavailable, using multithreaded CPU DLL fallback (%d threads per network, target %d; %d%% of %d detected cores - fixed, independent of how many charts run)",
|
|
__FUNCTION__, directml.CpuThreadsUsed(), CPU_THREADS_PER_NETWORK, share, (int)TerminalInfoInteger(TERMINAL_CPU_CORES));
|
|
}
|
|
else
|
|
PrintFormat("%s: DirectML/D3D12 GPU tier active", __FUNCTION__);
|
|
}
|
|
return true;
|
|
}
|
|
CNet::~CNet(void)
|
|
{
|
|
if(CheckPointer(layers) != POINTER_INVALID)
|
|
delete layers;
|
|
if(CheckPointer(m_weightSnapshot) != POINTER_INVALID)
|
|
delete m_weightSnapshot; // CArrayObj (FreeMode) deletes its per-neuron CArrayDouble elements
|
|
if(CheckPointer(m_prevLayerWeights) != POINTER_INVALID)
|
|
delete m_prevLayerWeights; // same - FreeMode owns the per-layer CArrayDouble elements
|
|
if(CheckPointer(opencl) != POINTER_INVALID)
|
|
{
|
|
opencl.Shutdown();
|
|
delete opencl;
|
|
}
|
|
if(CheckPointer(directml) != POINTER_INVALID)
|
|
delete directml;
|
|
}
|
|
#endif
|